Flight Controller / Hardware

FC27 — EMI Countermeasures

Mitigation Methods by Source and PCB Layout Implementation
Contents

    Last time, we categorized EMI sources at the circuit level. In this article, which is FC27, we will cover EMI countermeasures. While there is some overlap with the content from the EMI countermeasures series two series ago, this article is reconstructed within the context of the Hardware Design series as a practical countermeasure framework that integrates the decoupling (FC23), ground design (FC24), return current (FC25), and source analysis (FC26) discussed so far.

    Three-Stage Approach to EMI Countermeasures

    EMI countermeasures can be systematically organized into three stages: source countermeasures, propagation path countermeasures, and victim-side countermeasures.

    Source countermeasures are the most fundamental and effective approach. Preventing noise from being generated is the best countermeasure, which includes optimizing switching speeds and minimizing loop area (FC25).

    Propagation path countermeasures assume that noise has already been generated and block the path through which it travels to other circuits. Filtering, shielding, and ground design (FC24) fall into this category.

    Victim-side countermeasures are measures to increase the sensitivity (immunity) of sensors and ICs. The use of differential signals and appropriate decoupling (FC23) fall into this category.

    I would like to emphasize that source countermeasures are the most cost-effective in terms of priority, and designs that rely solely on victim-side countermeasures often do not provide a fundamental solution.

    Countermeasures for DC-DC Switching Noise

    We will systematically organize countermeasures for DC-DC converters, which were the largest source of noise last time.

    Minimizing the switching loop area is the top priority. Place the input capacitor at the shortest distance (ideally within 1mm) between the MOSFET drain and source to physically shrink the loop. This is the exact same principle as the switching loop minimization for ESC design explained in ESC11 through ESC14. The same placement principles apply to small DC-DC modules for FCs.

    Adding a snubber circuit suppresses ringing at the switching node (resonance between parasitic inductance and MOSFET output capacitance). Add an RC series circuit (tens of Ω + tens to hundreds of pF) between the switch node and GND to lower the Q value of the ringing and dissipate the energy as heat. Adding a snubber is a trade-off with a slight decrease in efficiency.

    Inserting a ferrite bead into the power line prevents conducted noise from entering the sensor system power supply from the DC-DC output. As explained in the series two series ago, selecting the appropriate frequency characteristics (a type where impedance peaks at several tens of MHz or higher) is important.

    The use of a shield can is a more aggressive countermeasure adopted in some industrial FCs. Covering the area around the DC-DC converter with a metal shield physically blocks radiated noise. While it involves increased cost and size, it is effective when particularly high quietness is required, such as in areas adjacent to GNSS.

    Countermeasures for High-Speed Digital Signals

    We will organize countermeasures for MCU clocks and high-speed peripheral signals.

    Securing the return current path (the principle of FC25) is the top priority. Ensuring a continuous GND plane directly under the signal wiring is the most effective EMI countermeasure that can be implemented without additional cost.

    Minimizing wiring length is particularly important for high-speed signals (clock, SPI, USB). Since longer wiring acts as an effective antenna, keep the SPI wiring between the MCU and IMU (mentioned in FC6) and the wiring between the clock circuit and the MCU as short as possible.

    Waveform shaping using gate resistors and termination resistors involves inserting damping resistors (22–33Ω) into signal lines such as SPI or UART to slow down signal edges, thereby reducing high-frequency components. This is the same principle as the ESC gate resistor design from the series two series ago.

    Conversion to differential signals is a standard countermeasure used for CAN and USB, which significantly reduces common-mode noise compared to single-ended signals. The content explained in detail in the previous series (CMRR, differential signals) serves as the foundation here as well.

    In clock wiring design, placing the clock signal on an inner layer and sandwiching both sides with GND planes to create a stripline structure can significantly suppress radiation (higher shielding effect than microstrip lines). This will be detailed in the PCB design series starting from FC31.

    Comprehensive Power System Filtering Strategy

    Integrating the power design knowledge explained in FC21 to FC23, we will organize power filtering strategies as EMI countermeasures.

    Multi-stage filtering is a design that layers filters incrementally as you move away from the noise source. This multi-stage configuration—an LC filter immediately after the DC-DC output, followed by a ferrite bead, and another filter stage just before the LDO input—allows each stage to eliminate noise in different frequency bands.

    A pi-filter (capacitor-inductor-capacitor) is effective as a countermeasure against noise intrusion on the DC-DC input side, particularly from the battery line. We apply the design formulas detailed in the previous series here as well.

    Independent filtering for each power system corresponds to the power tree structure explained in FC22. By placing individual filters at the input and output of each LDO and DC-DC converter, you prevent noise from one system from propagating to others.

    Intentional selection of switching frequency is a design decision to choose a fundamental DC-DC switching frequency that does not overlap with the harmonics of the GNSS band (1.575 GHz, 1.176 GHz) or Wi-Fi band (2.4 GHz, 5.8 GHz). For example, the harmonics of a 1.2 MHz switching frequency continue as 1.2, 2.4, 3.6... MHz, and the 1312th harmonic approaches 1.575 GHz. To avoid such coincidences, it is recommended to perform simulations or actual measurements with multiple candidate frequencies.

    Special Considerations Around GNSS/Compass

    We will reorganize the content explained in the previous series (GPS antenna placement, multi-GNSS design) and FC9 (compass implementation) from the perspective of EMI countermeasures.

    Setting keep-out zones is a layout strategy that establishes 'prohibited areas' around the GNSS antenna and compass where no DC-DC converters or high-speed digital signals are placed. As emphasized in the previous series, ensuring physical distance is the most effective countermeasure.

    A dedicated shield for GNSS is a design where a shield can is installed directly under the antenna to prevent radiated noise from other parts of the board from reaching the antenna directly. This is adopted in aircraft that require industrial-grade high-precision GNSS reception.

    Separating power systems applies the two-stage configuration (DC-DC to LDO) from FC22 specifically to the GNSS/compass, and selecting a high-PSRR LDO directly leads to a reduction in the noise floor.

    Design with EMC Testing in Mind

    While we will cover this in detail in FC28 (EMC Design), here we touch upon the relationship between EMI countermeasures and EMC standard compliance.

    EMC standards for automotive and consumer equipment, such as CISPR 25 and CISPR 32, are sometimes used as references for drone FC design. By having a design margin that is conscious of the radiated emission limits set by these standards, the pass rate for EMC testing as a final product is improved.

    Near-field probe measurement as a preliminary evaluation (detailed in the previous series) is effective as an early screening before formal EMC testing. It allows you to identify problematic frequency bands and their sources, reducing the number of measurements and costs at full-scale testing facilities.

    Framework for Prioritizing Countermeasures

    We will organize how to determine the priority of EMI countermeasures within limited design resources (board area, cost, development time).

    The top priority is free countermeasures. Ensuring return current paths (continuity of the GND plane) and proper component placement (minimizing loop area) have almost zero additional cost and are the most cost-effective measures. It is important to incorporate these at the initial stage of design (when determining the floor plan).

    The second priority is the addition of low-cost passive components. Ferrite beads, additional decoupling capacitors, and damping resistors cost only a few cents and are effective for specific problems.

    The third priority is higher-cost countermeasures. Shield cans, isolated components, and dedicated filter ICs are only worth the investment when there are specific, stringent requirements (high-precision GNSS, certification acquisition).

    As part of the design cycle, it is efficient to adopt a phased approach: apply the principles explained in FC25–FC27 as a layout review checklist before the initial prototype, perform actual measurements with near-field probes after prototyping, and add second- or third-priority countermeasures only to problematic areas.

    Implementation Checklist

    We will organize a practical EMI countermeasures checklist that integrates the discussions held so far.

    For power system verification, check if the DC-DC switching loop area is minimized, if the input filter (π-filter) is properly designed, if sensor power supplies are isolated with independent LDOs, and if decoupling capacitors are placed as close as possible (within 1mm) to the power pins of each IC.

    For ground system verification, check if there are unnecessary splits in the GND plane, if the GND plane is continuous directly beneath signal traces, and if GND stitching vias are placed at layer transition points.

    For high-speed signal verification, check if trace lengths are minimized, if damping resistors are inserted where necessary, and if differential signals are properly routed as pairs.

    For sensor peripheral verification, check if the GNSS antenna and compass are sufficiently far from noise sources and if keep-out zones are respected.

    For external interface verification, check if TVS diodes and common-mode chokes are placed near connectors and if noise countermeasures for cables are implemented.

    Verification Flow via Measurement

    We will organize a standard flow for verifying the effectiveness of designed EMI countermeasures on actual hardware.

    The first stage is power ripple measurement. Measure the ripple on each voltage rail with an oscilloscope and verify that it meets the target impedance set in FC23.

    The second stage is sensor noise floor evaluation. Check the IMU stationary noise (see FC7) and GNSS CN0 (see previous series) from logs to quantitatively evaluate improvements before and after EMI countermeasures.

    The third stage is near-field scanning. Identify hotspots on the board under various operating states (e.g., motor rotation, wireless communication) to confirm that radiation is occurring from the expected sources.

    The fourth stage is EKF innovation evaluation during actual flight (see FC14). Ultimately, confirming how sensor accuracy is reflected in EKF estimation precision using flight logs is the practical success criterion for EMI countermeasures.

    Summary

    EMI countermeasures are systematically implemented in three stages: source mitigation (most effective), propagation path mitigation, and victim-side mitigation. Minimizing the DC-DC switching loop and ensuring GND plane continuity (return current path) are the most cost-effective measures, which can be incorporated into the initial design at no additional cost. Ensuring physical distance around the GNSS/compass and independent isolation of power systems are critical measures that directly affect sensor accuracy. Based on a prioritization framework, it is an efficient development process to respond in stages, starting from free design principles to paid passive components, and finally to high-cost shielding measures. In the next installment, FC28, we will explain EMC design—a systematic design approach and test items aimed at regulatory compliance.

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