In the previous article, we explained the placement and capacitance selection of decoupling capacitors. In this article, which is FC24, we will cover ground design. We will explain the principles of ground design—the area most prone to misunderstanding in FC design and the one most directly linked to performance—from the perspective of why GND plane splitting is often a mistake.
Ground is not just "0V"
Although GND is drawn as a single node on a circuit diagram, the actual GND on a PCB is not an ideal equipotential surface. A GND plane has finite resistance and inductance, and a voltage drop occurs when current flows through it.
This voltage drop is called Ground Bounce. When a large current flows through a portion of the GND plane, a slight potential difference (a few mV to several tens of mV) occurs across that path. While this is usually not a problem for the noise margin of digital circuits, it becomes a fatal noise source for high-sensitivity analog circuits such as IMUs and GNSS.
The principle of GND plane continuity explained in the EMI series is a design guideline for minimizing this ground bounce. In this article, we will delve deeper into that principle and compare multiple ground design methods.
Single-Point Grounding
Single-point grounding is a design method in which multiple GND subsystems are connected at only one point.
This is a method traditionally used in low-frequency circuits (audio, instrumentation amplifiers), where the GND of each subsystem is gathered to a central point (star point) via independent wiring and connected at that single point. This prevents the current of each subsystem from passing through the GND paths of other subsystems, theoretically eliminating mutual interference.
Star Grounding is a specific implementation pattern of single-point grounding. Digital GND, analog GND, and power GND are wired independently and connected at a common single point (usually the most stable point of the power supply).
As an application example in FC design, some FCs adopt a design where the analog GND (AGND) of an IMU or GNSS and the digital GND (DGND) of the MCU are separated and connected only at a single point directly under the ADC converter or the sensor IC.
Problems with Single-Point Grounding: Failure at High Frequencies
However, single-point grounding causes serious problems in high-frequency circuits (several MHz or higher).
Star connection wiring itself has inductance. When high-frequency current (MCU clock, DC-DC switching) passes through this wiring inductance, a voltage drop and ringing proportional to the wiring length occur.
For signals of several MHz or higher, long wiring acts as a transmission line. Reflections occur due to impedance mismatch in the wiring, which actually worsens ground bounce.
The principle of return current explained in the EMI series (detailed in the next article, FC25) is a physical law stating that the return current of a high-frequency signal seeks to pass through the shortest path (directly under the signal wiring). If you intentionally lengthen the GND with star wiring, the return current is forced to take a long path, creating a large loop area and worsening EMI.
In modern FC design (MCUs operating at several hundred MHz, GHz-band communication), single-point grounding is generally inappropriate. Instead, a "continuous GND plane" has become the standard method.
Principles of a Continuous GND Plane
A continuous GND plane (Solid Ground Plane) is a design method that uses an entire layer of the PCB as GND without splitting it.
The advantage of this method is that the return current can flow freely directly under the signal wiring, minimizing the loop area. For high-frequency signals, a continuous GND plane provides an ideal environment where they can return via the shortest path anywhere.
As explained in the EMI series articles, splitting or cutting the GND plane forces the return current to take a detour, leading to an increase in loop area and worsening EMI. The principle of a continuous GND plane is the most fundamental rule in modern high-speed digital circuit design.
The conventional wisdom that 'analog GND and digital GND should be separated' is knowledge from the era of low-frequency circuits and is not necessarily applicable to modern FC designs that include MCUs operating at several hundred MHz or higher. In recent years, major semiconductor manufacturers such as Analog Devices and Texas Instruments have published design guidelines stating that 'a continuous GND plane is recommended, and unnecessary splitting should be avoided.'
Exceptional cases where splitting is justified
Even if a continuous GND plane is the principle, GND splitting is justified in some cases.
Physical separation is mandatory when electrical isolation is required (such as when motor power and logic power have different grounding systems, or when using isolated DC-DC converters). This is a requirement, not a design choice.
Limited splitting can be effective when very low-frequency (near DC) analog circuits (several hundred Hz or less) coexist with high-current digital circuits. However, this exception does not apply to FC design sensors (IMU, GNSS) because their internal processing operates at several MHz to several hundred MHz.
The correct implementation of splitting is connection via a 'bridge.' Connect the split GND planes with sufficiently wide copper foil at necessary points to ensure a return current path. A design that completely separates them and connects them with only a single ferrite bead significantly restricts the path of high-frequency current and becomes a cause of EMI problems.
GND design patterns in actual FC design
We evaluate GND design patterns that are common (and some that are problematic) in actual FC design.
Pattern 1: Fully continuous GND plane (Recommended) - Make one entire layer a continuous GND plane without splitting, and connect the GND pins of all ICs directly to this plane via vias. The same applies to the GND side of decoupling capacitors. This is the standard for modern high-speed digital circuit design.
Pattern 2: Analog/Digital split + bridge connection (Conditionally permissible) - A design that physically splits the GND of the analog part of sensors (IMU, GNSS) while connecting them with a sufficiently wide (several mm or more) bridge. It is a compromise that attempts to balance the advantages of splitting (control of current paths) and the advantages of continuity (ensuring return current), but the design difficulty is high and requires careful analysis.
Pattern 3: Complete split + single-point connection (Not recommended) - A design that completely separates analog GND and digital GND and connects them only with a single thin trace. Although this design applies the conventional wisdom of low-frequency circuits as is, it carries a high risk of causing serious EMI problems in modern FCs (MCUs operating at several hundred MHz, GHz-band communication) and is not recommended.
Many open-source FC designs compatible with ArduPilot (CubeOrange, Pixhawk series) adopt Pattern 1 (continuous GND plane). This speaks to its track record as an industry standard.
Practical GND design around sensors
Assuming a continuous GND plane, we organize the practical measures that should be taken in GND design around sensors.
Ensuring physical distance from noise sources is the most effective measure. Instead of splitting the GND plane, placing DC-DC converters and MCU clock circuits physically away from sensors attenuates the effects of ground bounce by the square to cube of the distance.
A Guard Ring is a technique of placing a dedicated GND copper ring around high-sensitivity analog circuits. It functions as an additional GND trace on the surface without splitting the plane, partially shielding against capacitive coupling noise from the surroundings.
Via Stitching is a technique for densely connecting GND planes between layers. When there are multiple GND layers in a multi-layer board, connecting these layers frequently with numerous vias lowers the effective GND impedance. As explained in the EMI series, high-frequency current follows the path of lowest impedance, so with sufficient via stitching, it will automatically choose the appropriate layer to flow through.
Avoiding split planes is also a basic policy in mixed-signal design. For ICs where GND pins are separated into analog and digital parts for the ADC (STM32's internal ADC also falls into this category), the modern mainstream approach is to design without physically splitting the plane as much as possible, while following the datasheet recommendations. Many datasheets recommend 'connecting analog GND and digital GND to the same plane and joining them directly under the ADC,' which is a design effort in placement rather than splitting.
Relationship between power system GND and signal GND
We organize the design considerations for the GND paths of the power system (VBAT, DC-DC) and the signal system.
Securing high-current GND paths means ensuring sufficient copper foil width for paths where return currents from DC-DC converters and motor power systems flow. Based on the power budget explained in FC21, design GND paths with sufficient cross-sectional area (a guideline of 1A/mm of copper foil width) for the assumed current.
As a layout strategy to avoid current density bias, it is effective to plan the power system return current paths before deciding on sensor placement, ensuring that high-current paths do not pass directly under sensors.
Utilizing GND across multiple layers is important for boards with 4 or more layers that have multiple GND layers (or a combination of GND and power planes). Stack-up design must be based on the fundamental principle (detailed in the next FC25) that return currents for surface signal traces pass through the GND or power plane directly beneath them, and return currents for inner-layer signal traces pass through the planes adjacent on both sides.
GND Design for Connectors
GND connections for external connectors (USB, CAN, UART, etc.) serve as the contact point with the entire airframe's GND system and require special consideration.
For connector shell GND connections, connect the metal shell of the USB connector to the board GND with low impedance. By using multiple GND pins and placing multiple vias for shell connection, the entry paths for ESD surges and high-frequency noise are kept at low impedance.
The problem of external GND loops via cables occurs when cables connecting multiple GND-referenced devices within the airframe (FC, ESC, external cameras, etc.) form unintended GND loops, creating paths for noise entry. The use of common-mode chokes, as explained in the EMI series, is the countermeasure for this problem.
For external interfaces requiring isolation, designs that physically break the GND loop via the connector using photocouplers or isolated transceivers (such as isolated CAN transceivers) are sometimes adopted in industrial FCs.
Verification Methods for Ground Design
We will organize the methods for verifying the quality of the designed GND system.
Continuity verification of the GND plane is performed using the PCB design tool's (KiCad, Altium) DRC (Design Rule Check) and visual inspection in the 3D view. Check for unintended GND splits (breaks caused by traces or vias). This is part of the verification covered in detail in FC30 (Mistakes that cannot be prevented by DRC alone).
Actual measurement using near-field probes is the same method explained in the EMI series. Since problems in the GND system eventually manifest as EMI, use near-field probes to check for abnormal GND-related hot spots.
Measurement of the sensor noise floor involves checking IMU/GNSS noise statistics (NKF4 innovation statistics, see FC14) on the actual machine to evaluate how the quality of the GND design manifests in final sensor performance. GND design issues often only become apparent under specific operating conditions (during motor rotation, during specific communication operations), so checking logs under various operating states is important.
Summary
The modern principle of ground design is to 'keep it continuous rather than splitting it.' Single-point grounding and star connections are traditional methods for low-frequency circuits, but in FC designs containing modern MCUs operating at several hundred MHz, they are generally inappropriate; a continuous GND plane minimizes return current paths and suppresses EMI. GND splitting is only justified when electrical isolation is a requirement, and even then, a bridge connection of sufficient width is necessary. Modern design standards dictate that noise countermeasures should be implemented through methods such as ensuring physical distance, guard rings, and via stitching, rather than GND splitting. In the next FC25, we will explain in detail the design principles for return currents—the return paths for high-frequency signals and minimum loop area.